This project is mirrored from https://gitlab.com/redhat/centos-stream/src/kernel/centos-stream-10.git.
Pull mirroring updated .
- Mar 29, 2025
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 0c9d2d2ef0d916b490a9222ed20ff4616fca876d commit 0c9d2d2ef0d916b490a9222ed20ff4616fca876d Author: Lorenzo Bianconi <lorenzo@kernel.org> Date: Wed Jan 8 10:50:42 2025 +0100 PCI: mediatek-gen3: Add comment about initialization order in mtk_pcie_en7581_power_up() Add a comment in mtk_pcie_en7581_power_up() to clarify, unlike the other MediaTek Gen3 controllers, the Airoha EN7581 requires PHY initialization and power-on before PHY reset deassert. Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-3-21ac939a3b9b@kernel.org Signed-off-by:
Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by:
Krzysztof Wilczyński <kwilczynski@kernel.org> Reviewed-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by:
Myron Stowe <mstowe@redhat.com>
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: e4c7dfd953f7618f0ccb70d87c1629634f306fab commit e4c7dfd953f7618f0ccb70d87c1629634f306fab Author: Lorenzo Bianconi <lorenzo@kernel.org> Date: Wed Jan 8 10:50:41 2025 +0100 PCI: mediatek-gen3: Move reset/assert callbacks in .power_up() In order to make the code more readable, the reset_control_bulk_assert() function for PHY reset lines is moved to make it pair with reset_control_bulk_deassert() in mtk_pcie_power_up() and mtk_pcie_en7581_power_up(). The same change is done for reset_control_assert() used to assert MAC reset line. Introduce PCIE_MTK_RESET_TIME_US macro for the time needed to complete PCIe reset on MediaTek controller. Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-2-21ac939a3b9b@kernel.org Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 0e7a622da17da0042294860cdb7a2fac091d25b1 commit 0e7a622da17da0042294860cdb7a2fac091d25b1 Author: Lorenzo Bianconi <lorenzo@kernel.org> Date: Wed Jan 8 10:50:40 2025 +0100 PCI: mediatek-gen3: Rely on clk_bulk_prepare_enable() in mtk_pcie_en7581_power_up() Replace clk_bulk_prepare() and clk_bulk_enable() with clk_bulk_prepare_enable() in mtk_pcie_en7581_power_up() routine. Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-1-21ac939a3b9b@kernel.org Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 149fc35734e50fc3200cf84c8efd711205961636 commit 149fc35734e50fc3200cf84c8efd711205961636 Author: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Date: Sun Jan 12 14:39:03 2025 +0100 PCI: layerscape: Use syscon_regmap_lookup_by_phandle_args Use syscon_regmap_lookup_by_phandle_args() which is a wrapper over syscon_regmap_lookup_by_phandle() combined with getting the syscon argument. Except simpler code this annotates within one line that given phandle has arguments, so grepping for code would be easier. Link: https://lore.kernel.org/r/20250112-syscon-phandle-args-pci-v1-2-fcb6ebcc0afc@linaro.org Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:
Frank Li <Frank.Li@nxp.com> Acked-by:
Roy Zang <Roy.Zang@nxp.com> Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: b881532991f81f5e3a069fe6d1a3e091400042b5 commit b881532991f81f5e3a069fe6d1a3e091400042b5 Author: Bjorn Helgaas <bhelgaas@google.com> Date: Sat Jan 18 13:55:58 2025 -0600 PCI: imx6: Clean up comments and whitespace For readability, fix typos and comments that needlessly exceed 80 columns. Link: https://lore.kernel.org/r/20250118210727.795559-1-helgaas@kernel.org Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 6dd24b0a858e64f9df596bf7cad2ddb436506f46 commit 6dd24b0a858e64f9df596bf7cad2ddb436506f46 Author: Richard Zhu <hongxing.zhu@nxp.com> Date: Tue Nov 26 15:56:59 2024 +0800 PCI: imx6: Remove surplus imx7d_pcie_init_phy() function This function essentially duplicates imx7d_pcie_enable_ref_clk(). So remove it. Link: https://lore.kernel.org/r/20241126075702.4099164-8-hongxing.zhu@nxp.com Signed-off-by:
Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 93d883f89063744a92006fc356b1c767eb62d950 commit 93d883f89063744a92006fc356b1c767eb62d950 Author: Richard Zhu <hongxing.zhu@nxp.com> Date: Tue Nov 26 15:56:58 2024 +0800 PCI: imx6: Add missing reference clock disable logic Ensure the *_enable_ref_clk() function is symmetric by addressing missing disable parts on some platforms. Fixes: d0a75c79 ("PCI: imx6: Factor out ref clock disable to match enable") Link: https://lore.kernel.org/r/20241126075702.4099164-7-hongxing.zhu@nxp.com Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: ef61c7d8d032adb467f99d03ccfaa293b417ac75 commit ef61c7d8d032adb467f99d03ccfaa293b417ac75 Author: Richard Zhu <hongxing.zhu@nxp.com> Date: Tue Nov 26 15:56:57 2024 +0800 PCI: imx6: Deassert apps_reset in imx_pcie_deassert_core_reset() Since the apps_reset is asserted in imx_pcie_assert_core_reset(), it should be deasserted in imx_pcie_deassert_core_reset(). Fixes: 9b3fe679 ("PCI: imx6: Add code to support i.MX7D") Link: https://lore.kernel.org/r/20241126075702.4099164-6-hongxing.zhu@nxp.com Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: f068ffdd034c93f0c768acdc87d4d2d7023c1379 commit f068ffdd034c93f0c768acdc87d4d2d7023c1379 Author: Richard Zhu <hongxing.zhu@nxp.com> Date: Tue Nov 26 15:56:56 2024 +0800 PCI: imx6: Skip controller_id generation logic for i.MX7D The i.MX7D only has one PCIe controller, so controller_id should always be 0. The previous code is incorrect although yielding the correct result. Fix by removing "IMX7D" from the switch case branch. Fixes: 2d8ed461 ("PCI: imx6: Add support for i.MX8MQ") Link: https://lore.kernel.org/r/20241126075702.4099164-5-hongxing.zhu@nxp.com Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 7ab93e6a08d1c10bb2aad82dcb678a6c6ea65c20 commit 7ab93e6a08d1c10bb2aad82dcb678a6c6ea65c20 Author: Richard Zhu <hongxing.zhu@nxp.com> Date: Tue Nov 26 15:56:55 2024 +0800 PCI: imx6: Fetch dbi2 and iATU base addesses from DT Since dw_pcie_get_resources() gets the dbi2 and iATU base addresses from DT, remove the code from the imx6 driver that does the same. Upstream DTSes have not enabled Endpoint function. So nothing is broken for old upstream DTBs. Link: https://lore.kernel.org/r/20241126075702.4099164-4-hongxing.zhu@nxp.com Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: de22e20589b79f35f92543119c33051f8179dba0 commit de22e20589b79f35f92543119c33051f8179dba0 Author: Frank Li <Frank.Li@nxp.com> Date: Tue Nov 19 14:44:24 2024 -0500 PCI: imx6: Configure PHY based on Root Complex or Endpoint mode Pass PHY_MODE_PCIE_EP if the PCI controller operates in Endpoint (EP) mode, and fix the Root Complex (RC) mode being hardcoded using a drvdata mode check. Fixes: 8026f2d8 ("PCI: imx6: Call common PHY API to set mode, speed, and submode") Link: https://lore.kernel.org/r/20241119-pci_fixup_addr-v8-6-c4bfa5193288@nxp.com Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 137250911f4e58e3a5ba9caa91288e0d101f70c4 Conflict(s): Patching file drivers/pci/controller/dwc/pci-imx6.c: Hunk #5 FAILED at 1644. Same conflict as occured upstream and resolved in merge commit 5b9c74b635a6 "Merge branch 'pci/controller/imx6'". commit 137250911f4e58e3a5ba9caa91288e0d101f70c4 Author: Richard Zhu <hongxing.zhu@nxp.com> Date: Tue Nov 26 15:56:54 2024 +0800 PCI: imx6: Add Refclk for i.MX95 PCIe Add "ref" clock to enable Refclk. To avoid breaking DT backwards compatibility, the i.MX95 "ref" clock is optional. Use devm_clk_get_optional() to fetch i.MX95 PCIe optional clocks in driver. If using external clock, "ref" clock should point to external reference. If using internal clock, CREF_EN in LAST_TO_REG controls reference output, implemented in drivers/clk/imx/clk-imx95-blk-ctl.c. Link: https://lore.kernel.org/r/20241126075702.4099164-3-hongxing.zhu@nxp.com Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: d4627402bd04795b039cb652bf0c6792ad654a84 commit d4627402bd04795b039cb652bf0c6792ad654a84 Author: Richard Zhu <hongxing.zhu@nxp.com> Date: Tue Nov 26 15:56:53 2024 +0800 dt-bindings: PCI: fsl,imx6q-pcie: Add Refclk for i.MX95 RC Previous Refclk of i.MX95 PCIe RC is on when system boot to kernel. But boot firmware change the behavior, it is off when boot. So it must be turned on when it is used. Also it needs be turned off/on for suspend and resume. Add one Refclk for i.MX95 PCIe RC. Increase clocks' maxItems to 5 and keep the same restriction with other compatible string. Link: https://lore.kernel.org/r/20241126075702.4099164-2-hongxing.zhu@nxp.com Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 687aedb73a401addf151c5f60e481e574b4c9ad9 commit 687aedb73a401addf151c5f60e481e574b4c9ad9 Author: Frank Li <Frank.Li@nxp.com> Date: Tue Nov 19 14:44:25 2024 -0500 PCI: imx6: Add i.MX8Q PCIe Endpoint (EP) support Add support for the i.MX8Q series (i.MX8QM, i.MX8QXP, and i.MX8DXL) PCIe Endpoint (EP). On the i.MX8Q platforms, the PCI bus addresses differ from the CPU addresses. However, the DesignWare (DWC) driver already handles this in the common code. Link: https://lore.kernel.org/r/20241119-pci_fixup_addr-v8-7-c4bfa5193288@nxp.com Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 3d2207256a373c510e4c29df0d4cfe9c1804b138 commit 3d2207256a373c510e4c29df0d4cfe9c1804b138 Author: Frank Li <Frank.Li@nxp.com> Date: Tue Nov 19 14:44:23 2024 -0500 dt-bindings: PCI: fsl,imx6q-pcie-ep: Add compatible string fsl,imx8q-pcie-ep Add new compatible string fsl,imx8q-pcie-ep for iMX8Q. The 'reg-names' property only needs 'dbi' and 'addr_space' because the others are located at a default offset. The new 'clock-names' property aligns with the Root Complex (RC) naming. Link: https://lore.kernel.org/r/20241119-pci_fixup_addr-v8-5-c4bfa5193288@nxp.com Signed-off-by:
Conor Dooley <conor.dooley@microchip.com> Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 1108d677dae296d2f05664bc71fd1d50bd61eb1f commit 1108d677dae296d2f05664bc71fd1d50bd61eb1f Author: Bjorn Helgaas <bhelgaas@google.com> Date: Fri Jan 17 17:51:19 2025 -0600 PCI: dwc: Simplify config resource lookup If platform_get_resource_byname("config") fails, return error immediately and unindent the normal path. No functional change intended. Link: https://lore.kernel.org/r/20250117235119.712043-1-helgaas@kernel.org Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 4dbf0155dfcfa65440b5f70d3e905261208b387e commit 4dbf0155dfcfa65440b5f70d3e905261208b387e Author: Frank Li <Frank.Li@nxp.com> Date: Tue Nov 19 14:44:19 2024 -0500 of: address: Add parent_bus_addr to struct of_pci_range Add a new field called 'parent_bus_addr' to struct of_pci_range to use when retrieving parent bus address information. Refer to the diagram below to better understand that the bus fabric in some systems (like i.MX8QXP) does not always use a 1:1 address map between input and output. Currently, many controller drivers use the cpu_addr_fixup() callback that would often hardcode address translation directly in the code, e.g., "cpu_addr & CDNS_PLAT_CPU_TO_BUS_ADDR" or "cpu_addr + BUS_IATU_OFFSET", etc., even though those translations *should* be described via DT. However, the cpu_addr_fixup() can be eliminated if DT correctly reflects hardware behavior and drivers use 'parent_bus_addr' in struct of_pci_range. ┌─────────┐ ┌────────────┐ ┌─────┐ │ │ IA: 0x8ff8_0000 │ │ │ CPU ├───►│ ┌────►├─────────────────┐ │ PCI │ └─────┘ │ │ │ IA: 0x8ff0_0000 │ │ │ CPU Addr │ │ ┌─►├─────────────┐ │ │ Controller │ 0x7ff8_0000─┼───┘ │ │ │ │ │ │ │ │ │ │ │ │ │ PCI Addr 0x7ff0_0000─┼──────┘ │ │ └──► IOSpace ─┼────────────► │ │ │ │ │ 0 0x7000_0000─┼────────►├─────────┐ │ │ │ └─────────┘ │ └──────► CfgSpace ─┼────────────► BUS Fabric │ │ │ 0 │ │ │ └──────────► MemSpace ─┼────────────► IA: 0x8000_0000 │ │ 0x8000_0000 └────────────┘ bus@5f000000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0x80000000 0x0 0x70000000 0x10000000>; pcie@5f010000 { compatible = "fsl,imx8q-pcie"; reg = <0x5f010000 0x10000>, <0x8ff00000 0x80000>; reg-names = "dbi", "config"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; bus-range = <0x00 0xff>; ranges = <0x81000000 0 0x00000000 0x8ff80000 0 0x00010000>, <0x82000000 0 0x80000000 0x80000000 0 0x0ff00000>; ... }; }; In the diagram above, the 'parent_bus_addr' field in struct of_pci_range can indicate internal address (IA) address information. Link: https://lore.kernel.org/r/20241119-pci_fixup_addr-v8-1-c4bfa5193288@nxp.com Signed-off-by:
Rob Herring (Arm) <robh@kernel.org> Acked-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 9d6b1bd6b3c83e36810570024ce4bbb8ec24f64e Conflict(s): Patching file drivers/pci/controller/dwc/pci-imx6.c: Hunk #2 FAILED at 1596. Same conflict as occurred upstream and resolved by upstream merge commit 349b434b7a19 "Merge branch 'pci/controller/dwc'". commit 9d6b1bd6b3c83e36810570024ce4bbb8ec24f64e Author: Richard Zhu <hongxing.zhu@nxp.com> Date: Tue Nov 26 15:57:01 2024 +0800 PCI: imx6: Add i.MX8MQ, i.MX8Q and i.MX95 PM support Add i.MX8MQ, i.MX8Q and i.MX95 PCIe suspend/resume support. Link: https://lore.kernel.org/r/20241126075702.4099164-10-hongxing.zhu@nxp.com Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: a528d1a725974d5e60a8b42fe4d0dade0b5fd026 Conflict(s): Patching file drivers/pci/controller/dwc/pci-imx6.c; Hunk #10 FAILED at 1299. Same conflict as occurred upstream and resolved by upstream merge commit 349b434b7a19 "Merge branch 'pci/controller/dwc'". commit a528d1a725974d5e60a8b42fe4d0dade0b5fd026 Author: Frank Li <Frank.Li@nxp.com> Date: Tue Nov 26 15:57:00 2024 +0800 PCI: imx6: Use DWC common suspend resume method Call common DWC suspend/resume function. Use DWC common iATU method to send out PME_TURN_OFF message. In old DWC implementations, PCIE_ATU_INHIBIT_PAYLOAD in iATU Ctrl2 register is reserved, so the generic DWC implementation of sending the PME_Turn_Off message using a dummy MMIO write cannot be used. Use the previous method to kick off PME_TURN_OFF message for these platforms. The System Reset Control (SRC) interface is used to toggle 'turnoff_reset' to send PME_TURN_OFF and since the DWC implementation is used, it is not needed now. Replace the imx_pcie_stop_link() and imx_pcie_host_exit() by dw_pcie_suspend_noirq() in imx_pcie_suspend_noirq(). Since dw_pcie_suspend_noirq() already does these, see below call stack: dw_pcie_suspend_noirq() dw_pcie_stop_link() imx_pcie_stop_link() pci->pp.ops->deinit() imx_pcie_host_exit() Replace the imx_pcie_host_init(), dw_pcie_setup_rc() and imx_pcie_start_link() by dw_pcie_resume_noirq() in imx_pcie_resume_noirq(). Since dw_pcie_resume_noirq() already does these, see below call stack: dw_pcie_resume_noirq() pci->pp.ops->init() imx_pcie_host_init() dw_pcie_setup_rc() dw_pcie_start_link() imx_pcie_start_link(; Link: https://lore.kernel.org/r/20241126075702.4099164-9-hongxing.zhu@nxp.com Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: ec57335b81d8fcf3088994c532b5ca21e839616a commit ec57335b81d8fcf3088994c532b5ca21e839616a Author: Bjorn Helgaas <bhelgaas@google.com> Date: Fri Jan 17 15:03:04 2025 -0600 PCI: dwc: Add dw_pcie_suspend_noirq(), dw_pcie_resume_noirq() stubs for !CONFIG_PCIE_DW_HOST Previously pcie-designware.h declared dw_pcie_suspend_noirq() and dw_pcie_resume_noirq() unconditionally, even though they were only implemented when CONFIG_PCIE_DW_HOST was defined. Add no-op stubs for them when CONFIG_PCIE_DW_HOST is not defined so drivers that support both Root Complex and Endpoint modes don't need Link: https://lore.kernel.org/r/20250117213810.GA656803@bhelgaas Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 112aba9a79345aae81c508d92c1e9711c81d791c commit 112aba9a79345aae81c508d92c1e9711c81d791c Author: Richard Zhu <hongxing.zhu@nxp.com> Date: Tue Dec 10 16:15:57 2024 +0800 PCI: dwc: Remove LTSSM state test in dw_pcie_suspend_noirq() It's safe to send PME_TURN_OFF message regardless of whether the link is up or down, so don't test the LTSSM state before sending the PME_TURN_OFF message. Only print an error message when the LTSSM is not in DETECT or POLL. There shouldn't be an error when no Endpoint is connected at all. Link: https://lore.kernel.org/r/20241210081557.163555-3-hongxing.zhu@nxp.com Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 86a016e278b78cc2281edd4ffaddbc011c87a593 commit 86a016e278b78cc2281edd4ffaddbc011c87a593 Author: Richard Zhu <hongxing.zhu@nxp.com> Date: Tue Dec 10 16:15:56 2024 +0800 PCI: dwc: Always stop link in the dw_pcie_suspend_noirq On the i.MX8QM, PCIe link can't be re-established again in dw_pcie_resume_noirq(), if the LTSSM_EN bit is not cleared properly in dw_pcie_suspend_noirq(). So, add dw_pcie_stop_link() to dw_pcie_suspend_noirq() to fix this issue and to align the suspend/resume functions since there is dw_pcie_start_link() in dw_pcie_resume_noirq() already. Fixes: 4774faf8 ("PCI: dwc: Implement generic suspend/resume functionality") Link: https://lore.kernel.org/r/20241210081557.163555-2-hongxing.zhu@nxp.com Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: ec9fd499b9c60a187ac8d6414c3c343c77d32e42 commit ec9fd499b9c60a187ac8d6414c3c343c77d32e42 Author: Niklas Cassel <cassel@kernel.org> Date: Mon Jan 13 11:59:34 2025 +0100 PCI: dw-rockchip: Don't wait for link since we can detect Link Up The Root Complex specific device tree binding for pcie-dw-rockchip has the 'sys' interrupt marked as required. The driver requests the 'sys' IRQ unconditionally, and errors out if not provided. Thus, we can unconditionally set 'use_linkup_irq', so dw_pcie_host_init() doesn't wait for the link to come up. This will skip the wait for link up (since the bus will be enumerated once the link up IRQ is triggered), which reduces the bootup time. Link: https://lore.kernel.org/r/20250113-rockchip-no-wait-v1-1-25417f37b92f@kernel.org Signed-off-by:
Niklas Cassel <cassel@kernel.org> [bhelgaas: commit log] Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 0e0b45ab5d770a748487ba0ae8f77d1fb0f0de3e commit 0e0b45ab5d770a748487ba0ae8f77d1fb0f0de3e Author: Niklas Cassel <cassel@kernel.org> Date: Wed Nov 27 15:50:42 2024 +0100 PCI: dw-rockchip: Enumerate endpoints based on dll_link_up IRQ Most boards using the pcie-dw-rockchip PCIe controller lack standard hotplug support. Thus, when an endpoint is attached to the SoC, users have to rescan the bus manually to enumerate the device. This can be avoided by using the 'dll_link_up' interrupt in the combined system interrupt 'sys'. Once the 'dll_link_up' IRQ is received, the bus underneath the host bridge is scanned to enumerate PCIe endpoint devices. This implements the same functionality that was implemented in the DWC based pcie-qcom driver in 4581403f ("PCI: qcom: Enumerate endpoints based on Link up event in 'global_irq' interrupt"). The Root Complex specific device tree binding for pcie-dw-rockchip already has the 'sys' interrupt marked as required, so there is no need to update the device tree binding. This also means that we can request the 'sys' IRQ unconditionally. Link: https://lore.kernel.org/r/20241127145041.3531400-2-cassel@kernel.org Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: f0639013d340580b72df95d012a93f35eeb0da64 commit f0639013d340580b72df95d012a93f35eeb0da64 Author: Krishna chaitanya chundru <quic_krichai@quicinc.com> Date: Sat Nov 23 00:40:01 2024 +0530 PCI: qcom: Update ICC and OPP values after Link Up event 4581403f ("PCI: qcom: Enumerate endpoints based on Link up event in 'global_irq' interrupt") added the Link Up-based enumeration support, but did not update the ICC/OPP vote once link is up. Before that, the update happened during probe and the endpoints may or may not be enumerated at that time, so the ICC/OPP vote was not guaranteed to be accurate. With Link Up-based enumeration support, the driver can request the accurate vote based on the PCIe link. Call qcom_pcie_icc_opp_update() in qcom_pcie_global_irq_thread() after enumerating the endpoints. Fixes: 4581403f ("PCI: qcom: Enumerate endpoints based on Link up event in 'global_irq' interrupt") Link: https://lore.kernel.org/r/20241123-remove_wait2-v5-3-b5f9e6b794c2@quicinc.com Signed-off-by:
Krishna chaitanya chundru <quic_krichai@quicinc.com> [kwilczynski: commit log] Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 36971d6c5a9a134c15760ae9fd13c6d5f9a36abb commit 36971d6c5a9a134c15760ae9fd13c6d5f9a36abb Author: Krishna chaitanya chundru <quic_krichai@quicinc.com> Date: Sat Nov 23 00:40:00 2024 +0530 PCI: qcom: Don't wait for link if we can detect Link Up If we have a 'global' IRQ for Link Up events, we need not wait for the link to be up during PCI initialization, which reduces startup time. Check for 'global' IRQ, and if present, set 'use_linkup_irq', so dw_pcie_host_init() doesn't wait for the link to come up. Link: https://lore.kernel.org/r/20241123-remove_wait2-v5-2-b5f9e6b794c2@quicinc.com Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 8d3bf19f1b585a3cc0027f508b64c33484db8d0d commit 8d3bf19f1b585a3cc0027f508b64c33484db8d0d Author: Krishna chaitanya chundru <quic_krichai@quicinc.com> Date: Sat Nov 23 00:39:59 2024 +0530 PCI: dwc: Don't wait for link up if driver can detect Link Up event If the driver can detect the Link Up event and enumerate downstream devices at that time, we need not wait here. Skip waiting for link to come up if the driver supports 'use_linkup_irq'. Link: https://lore.kernel.org/r/20241123-remove_wait2-v5-1-b5f9e6b794c2@quicinc.com Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 574913f9e197c050178f36b6e6fdd92031baa078 commit 574913f9e197c050178f36b6e6fdd92031baa078 Author: Niklas Cassel <cassel@kernel.org> Date: Sat Jan 4 01:21:20 2025 +0100 PCI: dwc: Fix potential truncation in dw_pcie_edma_irq_verify() Increase the size of the string buffer to avoid potential truncation in dw_pcie_edma_irq_verify(). This fixes the following build warning when compiling with W=1: drivers/pci/controller/dwc/pcie-designware.c: In function ‘dw_pcie_edma_detect’: drivers/pci/controller/dwc/pcie-designware.c:989:50: warning: ‘%d’ directive output may be truncated writing between 1 and 11 bytes into a region of size 3 [-Wformat-truncation=] 989 | snprintf(name, sizeof(name), "dma%d", pci->edma.nr_irqs); | ^~ Link: https://lore.kernel.org/r/20250104002119.2681246-2-cassel@kernel.org Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: ad9afd75030174e8f9eabd9d5c1a87a625db430c commit ad9afd75030174e8f9eabd9d5c1a87a625db430c Author: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Date: Sun Jan 12 14:39:02 2025 +0100 PCI: dra7xx: Use syscon_regmap_lookup_by_phandle_args Use syscon_regmap_lookup_by_phandle_args() which is a wrapper over syscon_regmap_lookup_by_phandle() combined with getting the syscon argument. Except simpler code this annotates within one line that given phandle has arguments, so grepping for code would be easier. There is also no real benefit in printing errors on missing syscon argument, because this is done just too late: runtime check on static/build-time data. Dtschema and Devicetree bindings offer the static/build-time check for this already. Link: https://lore.kernel.org/r/20250112-syscon-phandle-args-pci-v1-1-fcb6ebcc0afc@linaro.org Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: d9f6642ab7ca007ab899b2a89a6b754dcabcad47 commit d9f6642ab7ca007ab899b2a89a6b754dcabcad47 Author: Marc Zyngier <maz@kernel.org> Date: Wed Dec 4 15:01:45 2024 +0000 PCI: apple: Convert to {en,dis}able_device() callbacks Now that the core host-bridge infrastructure is able to give us a callback on each device being added or removed, convert the bus-notifier hack to it. Link: https://lore.kernel.org/r/20241204150145.800408-3-maz@kernel.org Signed-off-by:
Marc Zyngier <maz@kernel.org> Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 477ac7b0a7984e12e8db07fe54ad64443c5f8928 commit 477ac7b0a7984e12e8db07fe54ad64443c5f8928 Author: Marc Zyngier <maz@kernel.org> Date: Wed Dec 4 15:01:44 2024 +0000 PCI: host-generic: Allow {en,dis}able_device() to be provided via pci_ecam_ops In order to let host controller drivers using the host-generic infrastructure use the {en,dis}able_device() callbacks that can be used to configure sideband RID mapping hardware, provide these two callbacks as part of the pci_ecam_ops structure. Link: https://lore.kernel.org/r/20241204150145.800408-2-maz@kernel.org Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: ce4c4301728541db7e5f571a5688a3a236d9e488 commit ce4c4301728541db7e5f571a5688a3a236d9e488 Author: Frank Li <Frank.Li@nxp.com> Date: Tue Jan 14 15:37:09 2025 -0500 PCI: imx6: Add IOMMU and ITS MSI support for i.MX95 For the i.MX95, the configuration of a LUT is necessary to convert PCIe Requester IDs (RIDs) to StreamIDs, which are used by both IOMMU and ITS. This involves checking msi-map and iommu-map device tree properties to ensure consistent mapping of Requester IDs to the same StreamIDs. Subsequently, LUT-related registers are configured. If a msi-map isn't detected, the platform relies on DWC built-in controller for MSIs that do not need StreamIDs. Implement PCI bus callback function to handle enable_device() and disable_device() operations, setting up the LUT whenever a new PCI device is enabled. Known limitations: - If iommu-map exists in the device tree but the IOMMU controller is disabled, StreamIDs are programmed into the LUT. However, if a RID is out of range of the iommu-map, enabling the PCI device would result in a failure, although the PCI device can work without the IOMMU. - If msi-map exists in the device tree but the MSI controller is disabled, MSIs will not work. The DWC driver skips initializing the built-in MSI controller, falling back to legacy PCI INTx only. Link: https://lore.kernel.org/r/20250114-imx95_lut-v9-2-39f58dbed03a@nxp.com Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: a3751212a8eeece59d2018c455000f30ed7e5bb7 commit a3751212a8eeece59d2018c455000f30ed7e5bb7 Author: Frank Li <Frank.Li@nxp.com> Date: Tue Jan 14 15:37:08 2025 -0500 PCI: Add enable_device() and disable_device() callbacks for bridges Some PCI host bridges require special handling when enabling or disabling PCI devices. For example, the i.MX95 platform has a lookup table to map Requester IDs to StreamIDs, which the SMMU and MSI controller use to identify the source of DMA accesses. Without this mapping, DMA accesses may target unintended memory, which would corrupt memory or read the wrong data. Add a host bridge enable_device() hook the imx6 driver can use to configure the Requester ID to StreamID mapping. The hardware table isn't big enough to map all possible Requester IDs, so this hook may fail if no table space is available. In that case, return failure from pci_enable_device(). It might make more sense to make pci_set_master() decline to enable bus mastering and return failure, but it currently doesn't have a way to return failure. Link: https://lore.kernel.org/r/20250114-imx95_lut-v9-1-39f58dbed03a@nxp.com Tested-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: c25b978d351fae5da87794be9160d8acfa6e6823 commit c25b978d351fae5da87794be9160d8acfa6e6823 Author: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Date: Fri Dec 13 19:19:47 2024 +0530 dt-bindings: PCI: qcom: Document the IPQ5424 PCIe controller Document the PCIe controller on the IPQ5424 platform using the IPQ9574 bindings as a fallback, since the PCIe on the IPQ5424 is similar to IPQ9574. Link: https://lore.kernel.org/r/20241213134950.234946-2-quic_mmanikan@quicinc.com Signed-off-by:
Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 10e796eed62648ff928cb66d52f226452e1affff commit 10e796eed62648ff928cb66d52f226452e1affff Author: Neil Armstrong <neil.armstrong@linaro.org> Date: Tue Nov 26 11:22:49 2024 +0100 dt-bindings: PCI: qcom,pcie-sm8550: Document 'global' interrupt Qcom PCIe RC controllers are capable of generating 'global' SPI interrupt to the host CPU. This interrupt can be used by the device driver to handle PCIe link specific events such as Link up and Link down, which give the driver a chance to start bus enumeration on its own when link is up and initiate link training if link goes to a bad state. The PCIe driver can still work without this interrupt but it will provide a nice user experience when device gets plugged and removed. Document the interrupt as optional for SM8550 and SM8650 platforms. Link: https://lore.kernel.org/r/20241126-topic-sm8x50-pcie-global-irq-v1-1-4049cfccd073@linaro.org Signed-off-by:
Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: b02cfbd9bfb9f45eebb33771e5705af95b5c9673 commit b02cfbd9bfb9f45eebb33771e5705af95b5c9673 Author: Frank Li <Frank.Li@nxp.com> Date: Wed Dec 11 12:13:16 2024 -0500 dt-bindings: PCI: mobiveil: Convert mobiveil-pcie.txt to YAML Convert device tree binding document mobiveil-pcie.txt to YAML format and merge layerscape-pcie-gen4.txt into this file. Additional changes: - interrupt-names: "aer", "pme", "intr", which align order in examples. - reg-names: reorder as csr_axi_slave, config_axi_slave to match layerscape-pcie-gen4 and existing Layerscape DTS users. Fix below CHECK_DTBS warning: arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dtb: /soc/pcie@3400000: failed to match any schema with compatible: ['fsl,lx2160a-pcie'] Link: https://lore.kernel.org/r/20241211171318.4129818-1-Frank.Li@nxp.com Signed-off-by:
Lorenzo Pieralisi <lpieralisi@kernel.org> [kwilczynski: commit log] Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 392188bb0f6ec5162edf457c062929a6abfa369a commit 392188bb0f6ec5162edf457c062929a6abfa369a Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Date: Thu Jan 16 22:46:50 2025 +0530 selftests: pci_endpoint: Migrate to Kselftest framework Migrate the PCI endpoint test to Kselftest framework. All the tests that were part of the previous pcitest.sh file were migrated. Below is the list of tests converted: 1. BAR0 Test 2. BAR1 Test 3. BAR2 Test 4. BAR3 Test 5. BAR4 Test 6. BAR5 Test 7. Consecutive BAR Tests 8. Legacy IRQ Tests 9. MSI Interrupt Tests (MSI1 to MSI32) 10. MSI-X Interrupt Tests (MSI-X1 to MSI-X2048) 11. Read Tests - MEMCPY (For 1, 1024, 1025, 1024000, 1024001 Bytes) 12. Write Tests - MEMCPY (For 1, 1024, 1025, 1024000, 1024001 Bytes) 13. Copy Tests - MEMCPY (For 1, 1024, 1025, 1024000, 1024001 Bytes) 14. Read Tests - DMA (For 1, 1024, 1025, 1024000, 1024001 Bytes) 15. Write Tests - DMA (For 1, 1024, 1025, 1024000, 1024001 Bytes) 16. Copy Tests - DMA (For 1, 1024, 1025, 1024000, 1024001 Bytes) BAR, DMA and MEMCPY tests are added as fixture variants and can be executed separately as below: $ pci_endpoint_test -v BAR0 $ pci_endpoint_test -v dma $ pci_endpoint_test -v memcpy Link: https://lore.kernel.org/r/20250116171650.33585-5-manivannan.sadhasivam@linaro.org Co-developed-by:
Aman Gupta <aman1.gupta@samsung.com> Co-developed-by:
Padmanabhan Rajanbabu <p.rajanbabu@samsung.com> [mani: reworked based on the IOCTL fix, cleanups, documentation, commit message] Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: e19bde2269ca3611156fd0c078a71af0b6956545 commit e19bde2269ca3611156fd0c078a71af0b6956545 Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Date: Thu Jan 16 22:46:49 2025 +0530 selftests: Move PCI Endpoint tests from tools/pci to Kselftests This just moves the existing tests under tools/pci to tools/testing/selftests/pci_endpoint and adjusts the paths in Makefile accordingly. Migration to Kselftest framework will be done in subsequent commits. Link: https://lore.kernel.org/r/20250116171650.33585-4-manivannan.sadhasivam@linaro.org Signed-off-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: f26d37ee9bda938e968d0e11ba1f8f1588b2a135 commit f26d37ee9bda938e968d0e11ba1f8f1588b2a135 Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Date: Thu Jan 16 22:46:48 2025 +0530 misc: pci_endpoint_test: Fix IOCTL return value IOCTLs are supposed to return 0 for success and negative error codes for failure. Currently, this driver is returning 0 for failure and 1 for success, that's not correct. Hence, fix it! Link: https://lore.kernel.org/r/20250116171650.33585-3-manivannan.sadhasivam@linaro.org Fixes: 2c156ac7 ("misc: Add host side PCI driver for PCI test function device") Reported-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Closes: https://lore.kernel.org/r/YvzNg5ROnxEApDgS@kroah.com Signed-off-by:
Damien Le Moal <dlemoal@kernel.org> Reviewed-by:
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Myron Stowe authored
JIRA: https://issues.redhat.com/browse/RHEL-83611 Upstream Status: 4644db83642d92f6d7407a7786a72cb65c56c10a commit 4644db83642d92f6d7407a7786a72cb65c56c10a Author: Hans Zhang <18255117159@163.com> Date: Thu Jan 9 17:45:55 2025 +0800 misc: pci_endpoint_test: Remove redundant 'remainder' test A BAR size is always a power of two. buf_size = min(SZ_1M, bar_size). If the BAR size is <= 1MB, there will be one iteration, no remainder. If the BAR size is > 1MB, there will be more than one iteration, but the size will always be evenly divisible by 1MB, so no remainder. Link: https://lore.kernel.org/r/20250109094556.1724663-2-18255117159@163.com Suggested-by:
Hans Zhang <18255117159@163.com> Signed-off-by:
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