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Commit 68785a05 authored by Myron Stowe's avatar Myron Stowe
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Documentation PCI: Reformat RMW ops documentation

JIRA: https://issues.redhat.com/browse/RHEL-81906
Upstream Status: fad610b987132868e3410c530871086552ce6155

commit fad610b987132868e3410c530871086552ce6155
Author: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Date:   Fri Oct 18 17:47:47 2024 +0300

    Documentation PCI: Reformat RMW ops documentation

    Extract the list of RMW protected PCIe Capability registers into a
    bullet list to make them easier to pick up on a glance. An upcoming
    change is going to add one more register among them so it will be much
    cleaner to have them as bullets.

    Link: https://lore.kernel.org/r/20241018144755.7875-2-ilpo.jarvinen@linux.intel.com


Signed-off-by: default avatarIlpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarLukas Wunner <lukas@wunner.de>
Reviewed-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>

Signed-off-by: default avatarMyron Stowe <mstowe@redhat.com>
parent ef2902a2
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......@@ -217,8 +217,11 @@ capability structure except the PCI Express capability structure,
that is shared between many drivers including the service drivers.
RMW Capability accessors (pcie_capability_clear_and_set_word(),
pcie_capability_set_word(), and pcie_capability_clear_word()) protect
a selected set of PCI Express Capability Registers (Link Control
Register and Root Control Register). Any change to those registers
should be performed using RMW accessors to avoid problems due to
concurrent updates. For the up-to-date list of protected registers,
see pcie_capability_clear_and_set_word().
a selected set of PCI Express Capability Registers:
* Link Control Register
* Root Control Register
Any change to those registers should be performed using RMW accessors to
avoid problems due to concurrent updates. For the up-to-date list of
protected registers, see pcie_capability_clear_and_set_word().
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